2X1 MUX- Practical Using Multisim

Description The multiplexer is a combinational logic circuit designed to switch one of several input lines to a single common output line. The input A of this simple 2-1 line multiplexer circuit constructed from standard NAND gates acts to control which input ( I0 or I1 ) gets passed to the output at Q. From the truth table above, we can see that when the data select input, A is LOW at logic 0, input I1 passes its data through the NAND gate multiplexer circuit to the output, while input I0 is blocked. When the data select A is HIGH at logic 1, the reverse happens and now input I0 passes data to the output Q while input I1 is blocked. So by the application of either a logic “0” or a logic “1” at A we can select the appropriate input, I0 or I1 with the circuit acting a bit like a single pole double throw (SPDT) switch. As we only have one control line, (A) then we can only switch 21 inputs and in this simple example, the 2-input multiplexer connects one of two 1-bit sources to a common output, producing a 2-to-1-line multiplexer. We can confirm this in the following Boolean expression. Q = A.I0.I1 + A.I0.I1 + A.I0.I1 + A.I0.I1 and for our 2-input multiplexer circuit above, this can be simplified too: Q = A.I1 + A.I0 We can increase the number of data inputs to be selected further simply by following the same procedure and larger multiplexer circuits can be implemented using smaller 2-to-1 multiplexers as their basic building blocks. So for a 4-input multiplexer, we would, therefore, require two data select lines as 4-inputs represent 22 data control lines give a circuit with four inputs, I0, I1, I2, I3, and two data select lines A and B as shown.