Adding debug module to RISC-V RV32IMAC (FPGA)

Name: Adding debug module to RISC-V RV32IMAC (FPGA)
Uploaded: Jul 17, 2023
Duration: 520 s
Description: Adding basic debug functionality to RISC-V RM32IMAC FPGA implementation. https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/v11.3.0-1/ (GNU debugger) https://github.com/xpack-dev-tools/openocd-xpack/releases/tag/v0.12.0-1/ (OPENOCD)

Jin-Lien Lin162 subscribers

1.1K views

Jul 17, 2023

8:40

Adding basic debug functionality to RISC-V RM32IMAC FPGA implementation. https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/v11.3.0-1/ (GNU debugger) https://github.com/xpack-dev-tools/openocd-xpack/releases/tag/v0.12.0-1/ (OPENOCD)

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