Advanced 3D NAND Scaling Techniques Explained

Dive into the world of 3D NAND technology with our detailed discussion on scaling techniques. Learn about the challenges and solutions in creating taller 3D NAND devices, starting from 96 layers and beyond. Discover the intricacies of layer deposition, channel hole etching, and the use of tungsten and molybdenum for word lines. Understand the tiered approach using carbon plugs and stress compensation methods to prevent wafer bowing. Explore the bonding of CMOS circuitry to NAND wafers and the future of memory arrays with structures taller than 5 Empire State buildings. Explore careers today at: https://bit.ly/careersatlam Website: https://www.lamresearch.com/ Social Media: LinkedIn: https://www.linkedin.com/company/lam-research/ Facebook: https://www.facebook.com/LamResearchCorporation/ X: https://x.com/LamResearch Instagram: https://www.instagram.com/lam_research/