Automated Requirements Verification

Systems Modeling Language (SysML) is used to capture systems design as descriptive and analytical system models, which relate text requirements to the design and provide a baseline to support analysis and verification. This session demonstrates how model of the system, expressed with sufficient precision, can be used to support early requirements validation and design verification, particularly when coupled with an execution and simulation environment. Additionally, we show how to use test cases and associated verification procedures as combination of inspection, analysis, demonstration, and testing to verify that the designs satisfy the system requirements. In particular, the session demonstrates: -Representing text-based requirements in Cameo Systems Modeler -Requirements traceability, gap and coverage analysis -Refining and formalizing requirements -Selecting verification method -Defining testcases and analysis models -Performing automated requirements verification with Cameo Simulation Toolkit -Recording verification results, generating verification reports The session is hosted by Nerijus Jankevicius, MBSE Product Manager at No Magic Discuss with us on the CATIA MBSE Cyber Systems Community: https://go.3ds.com/cyber.systems