D-Algorithm for ATPG

University at Buffalo Department of Electrical Engineering, EE478 Kyle Gooding Final Project REFERENCES: [1] R. Drechsler, "Automatic Test Pattern Generation." [2] M. Balakrishnan, "Lecture 31 - D - Algorithm," S. Kashyap, Ed., ed. Youtube, 2012, p. 41:11. [3] T. Kirkland and M. R. Mercer, "Algorithms for automatic test-pattern generation," IEEE Design & Test of Computers, vol. 5, pp. 43-55, 1988. [4] C. Chuan-Wang and L. Shie-Jue, "An improved path sensitization method in test pattern generation for combinational circuits," in Industrial Automation and Control: Emerging Technologies, 1995., International IEEE/IAS Conference on, 1995, pp. 678-685. [5] J. Plusquellic, "ATPG Algorithms." [6] Wikipedia. (11/16/2016). Automatic Test Pattern Generation. Available: https://en.wikipedia.org/wiki/Automatic_test_pattern_generation [7] R. H. Bell, R. H. Klenke, J. H. Aylor, and R. D. Williams, "Results of a topologically partitioned parallel automatic test pattern generation system on a distributed-memory multiprocessor," in ASIC Conference and Exhibit, 1992., Proceedings of Fifth Annual IEEE International, 1992, pp. 380-384. [8] H.-K. Lee, "A Thesis Presented to The Faculty of the College of Engineering and Technology Ohio University," Master of Science, College of Engineering and Technology, Ohio University, 1986. [9] F. Kocan and D. G. Saab, "ATPG for combinational circuits on configurable hardware," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 9, pp. 117-129, 2001. [10] V. Singh, "Automatic Test Pattern Generation II," 01/30/2012. [11] H. Fujiwara, "A Fanout-Oriented Test Pattern Generation Algorithm," Meiji University, Dept. of Electronics and Communication, 1985.