Design for Test Fundamentals

This is an introduction to the concepts and terminology of Automatic Test Pattern Generation (ATPG) and Digital IC Test. In this video, we will go over the following concepts: - The difference between defects and faults - The fault models commonly used - How patterns are generated for combinational, sequential, and scanned circuits - Basic DFT design rules - Special tests such as for memory, cores, self-test, compression, I/Os, etc. - Test escapes and their effect on test volume and product quality - Basic diagnostics capabilities For more information about this course, visit: https://www.cadence.com/content/cadence-www/global/en_US/home/training/all-courses/82125.html For more information about our courses, visit: https://www.cadence.com/content/cadence-www/global/en_US/home/training.html Find more great content from Cadence: Subscribe to our YouTube channel: https://www.youtube.com/channel/UC5qqAsDzbA0zAQNBBQVsS0Q Connect with Cadence: Website: http://www.cadence.com Facebook: https://www.facebook.com/CadenceDesign LinkedIn: https://www.linkedin.com/company/cadence-design-systems/ Twitter: https://twitter.com/Cadence About Cadence Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company’s Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For. Learn more at www.cadence.com.