Easier UVM - Components and Phases

Doulos co-founder and technical fellow John Aynsley gives a tutorial on UVM components and phases in the context of the Easier UVM Code Generator. You can download the Easier UVM Coding Guidelines and Code Generator from Https://www.doulos.com/easier. Both are open and free to use, and can help you to start using UVM more quickly. This is just one of a series of UVM tutorials, watch the rest of the playlist here: https://www.youtube.com/playlist?list=PLBIILfL2t1lnvzw7vF0arlvu36Wj4--D7 Doulos provides scheduled classes online and in-person & delivers on-site team-based training & interactive online learning events worldwide – you can find out the very latest on our website: https://www.doulos.com POPULAR UVM TRAINING UVM Adopter Class: https://bit.ly/43Ywv6J Comprehensive SystemVerilog : https://bit.ly/3p8V5Ct To enquire about training for you, or for your team : https://bit.ly/3WZ9a1W Subscribe to our channel, @DoulosTraining, for more: - Introductory videos to range of our most popular training topics – System Verilog, UVM, SystemC & TLM-2.0, VHDL, Python & Deep Learning, & Arm. - Answers to common questions & “how to’s ”. - Our latest live & on-demand webinars (& joining links). Subscribe (and set your notifications): https://bit.ly/3MYWzsk Follow us on Twitter: @DoulosTraining Follow us on LinkedIn: https://uk.linkedin.com/company/doulosltd