FFT IP Core Tutorial Part 1: Vivado Simulation with Complex Numbers

How to configure, and validate a FFT IP core in Vivado using various test signals Understanding how FFT IP cores process complex data (16-bit real and 16-bit imaginary components) Configuring the FFT IP core with proper transform length, data width, and output ordering Integrating a signal generator that produces three test signals: complex single-tone, Sinc function, and rectangular function Properly handling AXI Stream signals including Tvalid and Tlast for correct packet processing Setting up a complete simulation design with clock generation, signal concatenation, and data extraction Calculating the magnitude of FFT outputs by processing real and imaginary components Validating the FFT implementation by observing the expected transforms of the test signals: Single-tone → single frequency peak Sinc function → rectangular function Rectangular function → Sinc function Chapters: 00:00 Introduction to FFT IP Core and AXI Stream Interface 01:11 Provided Signal Generator in GitHub 01:59 Understanding FFT Transform of Fundamentals Signal 02:31 Starting Vivado Simulation and FFT Core Configuring 04:03 Integrating & Configuring the Signal Generator Module 04:38 Connecting AXI Stream Signals 05:24 Processing FFT Outputs: Real and Imaginary Components 05:48 Computing Magnitude of FFT Results 06:54 Simulation and Results Analysis: Single-Tone Signal 07:44 Validating Sinc Function Transform 08:05 Testing Rectangular Waveform Transformation 08:23 Next Steps: FFT with AxiDMA Implementation You can find the simulation files here: https://github.com/FPGAPS/FFT_Tutorial