gem5 bootcamp 2022: Instruction execution and adding instructions

In this section, we go over how instructions execute in gem5's CPU models and how to add a new instruction to the RISC-V ISA Slides: https://github.com/gem5bootcamp/gem5-bootcamp-env/raw/main/assets/slides/develop-06-cpu-instructions.pdf More info: https://gem5bootcamp.github.io/gem5-bootcamp-env/ For comments, use the gem5-bootcamp channel in the gem5 slack. Invitation here: https://join.slack.com/t/gem5-workspace/shared_invite/zt-1aal963w6-_cqn0u8QgBh3GeeSi2Ja7g gem5 bootcamp 2022: Instruction execution and adding instructions Timecode 00:00 Intro 04:26 What is an ISA? 07:38 ISA and CPU Independence 14:19 Hgih-level concepts to understand nISA implementation in gem5 19:35 Journey of an Instruction in gem5 01:17:47 High-level Flow of Instruction Definition 01:20:19 Instruction Encoding/Decoding 01:38:33 Differences for Memory Operations 01:48:45 Adding New Instructions 02:23:38 Exercise: Add "sra16" Instruction