We've learned how interrupts relieve the CPU of the burden of polling, but what about the data transfer? A DMA will handle that for us. This lesson shows how.
Takeaways: At the completion of this lesson, each student should be able to:
• explain the benefits of direct memory access (DMA),
• describe the process of cycle stealing,
• explain how a cache supports the use of DMA,
• list the four things the DMA needs to complete a transfer, and
• show how different DMA configurations affect the number of memory cycles stolen per data element transfer.
#dma #io #bus
