Lead Lag Controller Design via Root Locus | Controller Design | Steady State Error | Transients

This lecture is about the design of Lead Lag Controller via root locus method. You'll study how to how to modify the trasnients specifications of the closed loop system by adding lead controller, by placing the dominant pair of poles at required position either by adjusting the gain or by reshaping the root locus. The transients specifications like rise time, peak time, percent overshoot, and settling time are changed as per requirements. Further you can reduce the steady state error by adding lag controller. In this a pole is added near to the origin then a zero is placed near to the pole. In the design process of lead lag controller two poles and two zeros are added to the closed loop system. #control_system #pi #pd #lead #lag #leadlag #controller #design #transent #overshoot #transients #peak #time #settling #time #rise #time #ideal #compensator #root #locus #steady #state #error #zero #error #reduced #error