Models for MOS transistors in integrated circuits

In this Video I have shown how one can simulate MOS transistors used in integrated circuit design. LTspice has possibilities for specifying MOS models of different complexity, including the most basic Shichman-Hodges model and several advanced models such as the BSIM models and the EKV model. I have shown three types of Model one can use in LTspice, namely: Level 1 Model, Level 3 Model and BSIM4 Model. Each models have their own merit. For example: -Level 1 models are useful for teaching because they are easy to correlate with hand analysis, but are too simplistic for modern design. -The SPICE 3 models add effects of velocity saturation, mobility degradation, sub-threshold conduction, and drain-induced barrier lowering. It is based on empirical equations that provide similar accuracy, faster simulation times, and better convergence. However, these models still do not provide good fits to the measured I-V characteristics of modern transistors. -The Berkeley Short-Channel IGFET1 Model (BSIM) is a very elaborate model that is now widely used in circuit simulation. The models are derived from the underlying device physics but use an enormous number of parameters to fit the behaviour of modern transistors. BSIM versions 1, 2, 3v3, and 4 are implemented as SPICE levels 13, 39, 49, and 54, respectively. LTspice uses Level=8 for BSIM3 and Level=54 for BSIM4.