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OR_Gate_Operation_HDL_Verilog_Programming |VTU| |CSE| |ECE| |Engineering|

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Aug 14, 2020
14:27

The OR gate is an electronic circuit that gives a high output (1) if one of its input is high. A plus (+) is used to show the OR operation. Verilog is a HARDWARE DESCRIPTION LANGUAGE (HDL). It is a language used for describing a digital system like a network switch or a microprocessor or a memory or a flip−flop. It means, by using a HDL we can describe any digital hardware at any level. The condition for the OR gate is that if both the inputs are low, then the output is also low, else in every other condition that has to be high.

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