Pass transistor Logic

BVLSI Lecture 23 covers the following topics: 1. Why NMOS passes Strong Logic 0 and Weak Logic 1 (with LT spice simulation) 2. Why PMOS passes Strong Logic 1 and Weak Logic 0 (with LT spice simulation) 3. PMOS as Pull-up and NMOS as a Pull-down as choices for CMOS Inverter 4. Pass transistor concept 5. Functionality verification ( by concept & by LTspice simulation ) of 2 input AND gate using NMOS Pass transistor logic 6. Transistor level Implementation of NAND and NOR gate using NMOS pass transistor logic ( Given as Home work) 7. Transistor level Implementation of XOR gate using NMOS pass transistor logic ( by concept & by LTspice simulation) 8. Transistor level Implementation of XNOR gate using NMOS pass transistor logic ( Given as Home work) 9. Transistor level Implementation of a Boolean expression using NMOS pass transistor logic NOTE: Inconvenience regretted for few output heading error for voltage truth tables for NAND, XOR gates