A myriad of low cost SDR platforms are now available on the market. These platforms have in common that the baseband processing is carried out in a files programmable gate array (FPGA). Another common characteristic is the instantaneous bandwidth, that is typically 20MHz.
In this project we propose a Red Pitaya based large-bandwidth low-cost SDR architecture. The components of this architecture are chosen, such that the bottleneck in the transmit/receive chain will be the Red Pitaya board. Read full article here: https://bit.ly/3zE1o3q
