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STA lec13 defining constraints | static timing analysis tutorial | VLSI

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May 9, 2021
10:55

#vlsi #academy #sta #setup #hold #VLSI #electronics #semiconductor #cell #delay This video describes about how logical drc constraints are defined. It describes in detail with examples that how is it calculated and specified in design. Must watch not only for beginners but also for professionals for refreshing the concepts.

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STA lec13 defining constraints | static timing analysis tutorial | VLSI | NatokHD