This video is about the synhesizable constructs in VLSI.The different types of synthesizable constructs like Fully supported,partially supported,ignored and unsupproted Verilog constructs.
Synthesizable constructs
Verilog for VLSI
Hardware description language
VLSI design
Digital circuit synthesis
RTL (Register Transfer Level) design
Combinational logic synthesis
Sequential logic synthesis
Hardware synthesis techniques
Behavioral modeling in Verilog
Synthesis optimization
Design constraints in VLSI
Timing analysis in synthesis
Power optimization in VLSI design
Design for Testability (DFT) in VLSI.
#rtl
#vlsi
#verilog
#ُembeddedsystem
#vlsiprojects
#vlsidesign
#vhdl
#ece
#fpga
#vivado
#xilinx