Timeloop/Accelergy Tutorial @ ISCA 2020

Tutorial Website: http://accelergy.mit.edu/isca20_tutorial.html Video of hands-on exercises can be found at https://youtu.be/dchmgjmt5Yk Outline: 0:00 - Introduction / Motivation 12:59 - Timeloop (Part 1) 1:09:00 - Accelergy (Part 2) Timeloop Slides: http://accelergy.mit.edu/isca2020/2020_05_29_timeloop_accelergy_tutorial_part1.pdf Accelergy Slides: http://accelergy.mit.edu/isca2020/2020_05_29_timeloop_accelergy_tutorial_part2.pdf Deep neural networks have emerged as the key approach for solving a wide range of complex problems. To provide high performance and energy efficiency to this class of computation and memory-intensive applications, many DNN accelerators have been proposed in recent years. In order to systematically evaluate arbitrary DNN accelerator designs, we need to have an infrastructure that is able to: * Describe a wide range of architectures * Find optimal mappings for a wide range of workloads onto the architecture * Accurately predict energy for a range of accelerator designs * Handle a wide range of technologies In this tutorial, we will present two integrated tools that enable rapid evaluation of DNN accelerators: * Mapping exploration with Timeloop: http://accelergy.mit.edu/timeloop.pdf * Energy estimation with Accelergy: http://accelergy.mit.edu/paper.pdf Tutorial Organizers: Angshuman Parashar (NVIDIA), Yannan Nellie Wu (MIT), Po-An Tsai (NVIDIA), Vivienne Sze (MIT), Joel S. Emer (NVIDIA, MIT)