Using FPGA-Based SmartNICs for Packet Processing at 400 Gbps+

Presentation from SmartNIC Summit 2023. With the increasing demand for high-speed networking, FPGA-based SmartNICs have emerged as a promising solution to accelerate network packet processing. However, developing specific FPGA network applications for 400 Gbps wire-speed and higher presents significant challenges, including limited resources and the need for specialized knowledge in both FPGA and network programming. In this presentation, we discussed these challenges in detail and provide insights into how they can be addressed. Slides available to download here: https://bit.ly/smartnic_summit 00:00 Introduction 00:44 The need for speed 01:33 Established 100GbE solutions 03:32 Emerging 400GbE hardware 04:26 Matching speed on the other side 05:20 How to harness such power? 06:09 Trinity of obvious (bad) choices 07:56 Low-level paradigm shift imminent 09:05 Build-a-pipeline for 400Gbe solutions 09:55 The DYNANIC answer 12:17 Conclusion #FPGA #SmartNIC #400G