Versal Embedded Design Tutorial - Building for the Cortex-R5

This Versal Embedded Design Tutorial (EDT) series is an introduction for using the Xilinx® Vivado® Design Suite flow on a VMK180/VCK190 evaluation board. The tools used are Vivado® 2020.2 Design Suite and the Vitis™ 2020.2 unified software. These examples focus on introducing you to the useful aspects of embedded design. This tutorial demonstrates the procedure to create a Hello World application from Arm Cortex-A72 on On-chip-memory (OCM) & add a new RPU domain to the platform project. ***Video timeline *** 0.28 Agenda 0.33 Step 1: Launching Vitis and add the XSA file for creating an Application project for Cortex-A72 1:17 Step 2: Creating Hello world Application for Cortex-A72 2:51 Step 3: Adding an RPU Domain 3:53 Step 4: Creating standalone application project fro Cortex-R5F 5:12 Step 5: Modifying application Linker script 5:54 Step 6: Running Application using System Debugger Useful Resources: Tutorial Link: https://github.com/Xilinx/Embedded-Design-Tutorials/tree/2020.2/Versal-EDT Versal Example Designs https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/487489537/Versal+Example+Designs Do you have a technical question? Ask it on the Xilinx Community Forums and get advice from a fantastic community.