VLSI Design-Verification Roadmap | STMicroelectronics Interview Guide | Coding for Core Electronics

In this video, we explore Dhruv's inspiring career journey — from coding at college to acing high-stakes interviews and securing prestigious internship and job at STMicroelectronics and Siemens respectively. Discover his top strategies for building strong fundamental, standout in tech giant interviews, and mastering the soft skills that truly matter in today’s corporate world. Whether you're a student, job seeker, working professional or just curious about what it takes to thrive in competitive spaces, this video is packed with insights you won't want to miss! Dhruv's LinkedIn Profile: https://www.linkedin.com/in/dhruvgupta1312?utm_source=share&utm_campaign=share_via&utm_content=profile&utm_medium=ios_app Medium link: https://medium.com/@guptadhruv1345 Timestamp: 00:00 – Introduction 06:00 – How to prepare for an internship in VLSI domain ? 08:59 – Key subjects to prepare 13:07 – Projects and the role of intern in STMicroelectronics 17:24 – What is the Verification domain in VLSI? 18:57 – How should a student start preparation for DV (Design Verification) domain? 24:13 – Programming languages to focus on 26:00 – Projects to be made 28:46 – For students aligned more towards Python/coding (not HDL), which domain is suitable? 30:57 – Code or Circuit? 31:12 – Cadence or Mentor (tools)? 31:27 – One must-have skill for VLSI freshers in 2025 31:40 – GitHub or Books – which is more useful? 32:11 – One subject to relearn in VLSI 32:46 – Advice for VLSI freshers 33:44 – How to decide between Software and VLSI domain? 36:38 – How can students apply for internships? 37:50 – Closure Resources: RTL to GDS Demo https://youtube.com/playlist?list=PLZU5hLL_713zf_i38C7uLu5pUz5wTjKul&si=WABJXCsgPpRQlGzS Digital VLSI Design (RTL to GDS) https://youtube.com/playlist?list=PLZU5hLL_713x0_AV_rVbay0pWmED7992G&si=TS1Yu_1dN4J_5nat Interview Q&A: Static Timing Analysis https://youtube.com/playlist?list=PLPmSCnkkX4qu3y6qEJ8xptEQKKG2_NnDj&si=5b5-gQlV6sksE0BE Timing in Digital Circuits https://youtube.com/playlist?list=PLD5C0Wv5Dnmdv-B6NGOu4MA3yDlqFfdre&si=J65LywN3NkCRt36p VLSI Physical Design Full Course https://youtube.com/playlist?list=PL1h5a0eaDD3pimcMlzW15RpW02HPzIziL&si=neLJmT8upXI0vAuP Profile Links: Telegram : https://t.me/vlsipoint Instagram : https://www.instagram.com/vlsi_point?utm_source=qr Facebook : https://www.facebook.com/share/YEnKzRGnGUcJrprt/?mibextid=LQQJ4d LinkedIn : https://www.linkedin.com/company/vlsi-point/ Checkout the following Playlists: VLSI Placement Season https://www.youtube.com/playlist?list=PL_3xKnVkfI2hcT4DPA7ez9zhZH_8s3uki All About VLSI https://www.youtube.com/playlist?list=PL_3xKnVkfI2iQnYEXPGoHd3In0F-3SZL5 Verilog Interview questions https://www.youtube.com/playlist?list=PL_3xKnVkfI2jjzXnEQffAHxVPQFCQyvB3 FPGA Based System Design in English https://www.youtube.com/playlist?list=PL_3xKnVkfI2iusWOR-6xI-BeAcGUP-LMf Verilog complete tutorial in English https://www.youtube.com/playlist?list=PL_3xKnVkfI2itQhCyfnamNYSCHd2KHi4k Verilog complete tutorial in Hindi https://www.youtube.com/playlist?list=PL_3xKnVkfI2hB9gBEsv5QGB4LRscGAQl9 #stmicroelectronics #verification #vlsi #placement #jobs #gate #vlsipoint #ece #electronics #rtl #iit