Computer Organization and Architecture NPTEL IITG

COA [Module 04 - Lecture 10] Page Replacement Algorithms

Computer Organization and Architecture NPTEL IITG

COA [Module 04 - Lecture 9] Cache Indexing and Tagging Variations, Demand Paging

Computer Organization and Architecture NPTEL IITG

COA [Module 04 - Lecture 11] Page Frame Allocation and Thrashing

Computer Organization and Architecture NPTEL IITG

COA [Module 04 - Lecture 08] TLBs and Page Fault Handling

Computer Organization and Architecture NPTEL IITG

COA [Module 04 - Lecture 07] Paging and Segmentation

Computer Organization and Architecture NPTEL IITG

COA [Module 04 - Lecture 06] Basics of Virtual Memory and Address Translation

Computer Organization and Architecture NPTEL IITG

COA [Module 04 - Lecture 12] Summary

Computer Organization and Architecture NPTEL IITG

COA [Module 04 - Lecture 04] Associative and Multi-level Caches

Computer Organization and Architecture NPTEL IITG

COA [Module 04 - Lecture 03] Direct-mapped Caches Misses, Writes and Performance

Computer Organization and Architecture NPTEL IITG

COA [Module 04 - Lecture 05] Summary

Computer Organization and Architecture NPTEL IITG

COA [Module 04 - Lecture 02] Basics of Memory and Cache (Part-2)

Computer Organization and Architecture NPTEL IITG

COA [Module 04 - Lecture 01] Basics of Memory and Cache (Part-1)

Computer Organization and Architecture NPTEL IITG

COA [Module 05 - Lecture 04] Storage Devices

Computer Organization and Architecture NPTEL IITG

COA [Module 05 - Lecture 03] DMA Transfer

Computer Organization and Architecture NPTEL IITG

COA [Module 05 - Lecture 02] Interrupt Driven IO

Computer Organization and Architecture NPTEL IITG

COA [Module 05 - Lecture 01] InputOutput Primitives

Computer Organization and Architecture NPTEL IITG

COA [Module 03 - Lecture 08] Organization and Optimization of Microprogrammed Control unit

Computer Organization and Architecture NPTEL IITG

COA [Module 03 - Lecture 07] Microinstructions and Microprograms

Computer Organization and Architecture NPTEL IITG

COA [Module 03 - Lecture 09] Different Internal CPU Bus Organization

Computer Organization and Architecture NPTEL IITG

COA [Module 03 - Lecture 06] Design of Hardwired controlled Control Unit

Computer Organization and Architecture NPTEL IITG

COA [Module 03 - Lecture 05] Handling Control Transfer Instructions

Computer Organization and Architecture NPTEL IITG

COA [Module 03 - Lecture 02] Control Signals and Timing Sequence

Computer Organization and Architecture NPTEL IITG

COA [Module 03 - Lecture 01] Instruction Cycle and Micro-operations

Computer Organization and Architecture NPTEL IITG

COA [Module 03 - Lecture 03] Control Signals for Complete Instruction Execution

Computer Organization and Architecture NPTEL IITG

COA [Module 03 - Lecture 04] Handling Different Addressing Modes

Computer Organization and Architecture NPTEL IITG

COA [Module 02 - Lecture 07] Flags and Conditional Instructions

Computer Organization and Architecture NPTEL IITG

COA [Module 02 - Lecture 08] Instruction Procedure CALLRETURN

Computer Organization and Architecture NPTEL IITG

COA [Module 02 - Lecture 06] Addressing Modes

Computer Organization and Architecture NPTEL IITG

COA [Module 02 - Lecture 04] Instruction Format

Computer Organization and Architecture NPTEL IITG

COA [Module 02 - Lecture 05] Instruction Set

Computer Organization and Architecture NPTEL IITG