Dr.HariPrasad Naik Bhattu

9.63K subscribers

154 videos

Welcome to Dr.HariPrasad Naik Bhattu's YouTube Channel! Are you aspiring to excel in the world of VLSI? You've found the perfect resource! This channel is de...

Latest Videos

Strong ARM Comparator Analysis.

Differential Pair Analysis in Cadence DC AC Transient .

Analyis of Various CMOS CURRENT MIRRORs Cadence.

DC Characteristics of CNFET Based Analog Multiplier.

CNFET Based ANALOG MULTIPLIER in Cadence.

CMOS Dynamic Comparator Analysis in Cadence.

2-Stage Analog Comparator Design in Cadence.

CMOS Analog Multiplier DC Characteristics.

CMOS ANALOG MULTIPLIER Design in Cadence.

CNFET Full Adder

Full Adder Design Uisng Virtual Source CNFET (VS-CNFET) in Cadence.

Verilog-A Virtual Source Carbon Nano FET (VS-CNFET) in Cadence.

Schematic THICK WIRES, LINES & SYMBOLS in Cadence Virtuoso.

Parameterize Voltage Controlled Ring Oscillator in Cadence.

How to Set Font Size CIW, Label, Text in Cadence.

DC Annotations Region, Vth, Id, Vgs, Ron, gm of MOS in Cadence.

4-Bit ARRAY MULTIPLIER in Cadence.

42 Exact Compressor Design in Cadence.

4-Bit Shift Register (SISO & SIPO) in Cadence

Level Sensitive D-Latch Schematic in Virtuoso.

How to Create and Package New IP in Vivado.

4-Bit Shift Register (SISO & SIPO) using D-Flipflop.

Use of Parallel Signed Multiplier IP in Vivado.

Use Adder Subtractor IP in Xilinx Vivado.

2-Stage Op-AMP Design and AC Analysis.

Op-Amp DC Optimization for Region, Ids.

OP-AMP Analysis DC AC TRANSIENT .

Single Stage OPAMP Design and Analysis.

HYBRID FULL ADDER in Cadence Delay AvgPower PDP.

2-BIT Binary MULTIPLIER Design using Half Adders Cadence.