Microelectronic Systems Design Research Group

Blockchain-based Smart Outlet - Demonstrator

Microelectronic Systems Design Research Group

Speculative Temporal Decoupling Using fork()

Microelectronic Systems Design Research Group

25 Years of Turbo Codes From Mbs to beyond 100 Gbs [ISTC18]

Microelectronic Systems Design Research Group

When Channel Coding Hit the Implementation Wall

Microelectronic Systems Design Research Group

Introduction to Blockchain

Microelectronic Systems Design Research Group

Agile FPGA Programming

Microelectronic Systems Design Research Group

Hyper Platform

Microelectronic Systems Design Research Group

Design Space & Terminology

Microelectronic Systems Design Research Group

Creating Custom AXI Master Interfaces Part 4 (Lesson 7)

Microelectronic Systems Design Research Group

Creating Custom AXI Master Interfaces Part 3 (Lesson 7)

Microelectronic Systems Design Research Group

Creating Custom AXI Master Interfaces Part 2 (Lesson 7)

Microelectronic Systems Design Research Group

Creating Custom AXI Master Interfaces Part 1 (Lesson 7)

Microelectronic Systems Design Research Group

Creating Custom AXI Slave Interfaces Part 2 (Lesson 6)

Microelectronic Systems Design Research Group

Creating Custom AXI Slave Interfaces Part 1 (Lesson 6)

Microelectronic Systems Design Research Group

AXI Memory Mapped Interfaces & Hardware Debugging in Vivado (Lesson 5)

Microelectronic Systems Design Research Group

ZYNQ AXI Interfaces Part 2 (Lesson 4)

Microelectronic Systems Design Research Group

ZYNQ AXI Interfaces Part 1 (Lesson 3)

Microelectronic Systems Design Research Group

ZYNQ Boards (Lesson 2)

Microelectronic Systems Design Research Group

What is ZYNQ (Lesson 1)

Microelectronic Systems Design Research Group

Thermal Simulation of MPSoCs with Wide-IO DRAM

Microelectronic Systems Design Research Group