Steven Bell

Implementing the candy-lock FSM in VHDL

Steven Bell

Digital logic FSM example locked candy dispenser

Steven Bell

Introduction to finite state machines for digital logic

Steven Bell

How to insert the UPduino into a breadboard

Steven Bell

How to remove your UPduino from a breadboard

Steven Bell

How to insert and remove IC DIP packages in a breadboard

Steven Bell

Basics of using an oscilloscope

Steven Bell

How to use the digital multimeter and DC power supply

Steven Bell

More advanced VHDL debugging with Lattice Radiant

Steven Bell

How to set the top module and enable VHDL-2008 in Lattice Radiant

Steven Bell

How to see synthesis errors in Lattice Radiant

Steven Bell

How (and why) to write a good debug log

Steven Bell

Building a D flip-flop with VHDL

Steven Bell

Structural modeling with VHDL

Steven Bell

What good is structural modeling

Steven Bell

Building and analyzing a D flip-flop

Steven Bell

Building and analyzing a D latch

Steven Bell

Behavior of an SR latch, step by step

Steven Bell

What are flip-flops good for

Steven Bell

What is a VHDL process (Part 2)

Steven Bell

Simulating VDHL code with GHDL

Steven Bell

What is a VHDL process (Part 1)

Steven Bell

Anatomy of a VHDL module

Steven Bell

How to think about VHDL

Steven Bell

Your first project with Lattice Radiant

Steven Bell

Implementing logic functions with multiplexers (and how FPGAs work)

Steven Bell

What are multiplexers good for

Steven Bell

Practice with Karnaugh maps

Steven Bell

Making sense of Boolean algebra theorems

Steven Bell

DeMorgan's theorem

Steven Bell