1:12Experiment 10B-ALL ZERO DETECTOR (Schematic, Symbol, Test Circuit) Design using CadenceSunil MP122 views·1 month ago
6:36Experiment11-PARITY GENERATOR-(Even and Odd) (Schematic, Symbol, Test Circuit) Design using CadenceSunil MP143 views·1 month ago
4:25Experiment 10A-ALL ONE DETECTOR (Schematic, Symbol, Test Circuit) Design using CadenceSunil MP139 views·1 month ago
10:38Experiment 9-MULTIPLIER -2X2 (Schematic, Symbol, Test Circuit) Design using CadenceSunil MP138 views·1 month ago
9:28Experiment 6-21 MUX (Schematic, Symbol, Test Circuit) Design using CadenceSunil MP156 views·1 month ago
5:49Experiment 7A-FULL ADDER (Schematic, Symbol, Test Circuit) Design using CadenceSunil MP203 views·1 month ago
15:23Experiment 7A-HALF ADDER (Schematic, Symbol, Test Circuit) Design using CadenceSunil MP188 views·1 month ago
12:56Experiment 8-1 BITCOMPARATOR (Schematic, Symbol, Test Circuit) Design using CadenceSunil MP164 views·1 month ago
12:21Experiment 5B-CMOS XNOR Gate (Schematic, Symbol, Test Circuit) design using CadenceSunil MP174 views·2 months ago
14:01Experiment 5A-CMOS XOR Gate (Schematic, Symbol, Test Circuit) design using CadenceSunil MP210 views·2 months ago
11:34Experiment-3-CMOS Inverter (Schematic, Symbol, Test Circuit, Layout) design using CadenceSunil MP115 views·2 months ago