Latest Videos
42 Encoder [with detail explanation, boolean expression, circuit diagram]
Simplify Tech2Learn
111.8K views·4 years ago
Magnitude Comparator[with Detailed Explanation, circuit diagram ]
Simplify Tech2Learn
2.5K views·4 years ago
38 DECODER WITH 24 DECODER [Detailed Explanation and Diagram]
Simplify Tech2Learn
65.4K views·4 years ago
ENCODER [with Explanation, Logic expression and Circuit Diagram]
Simplify Tech2Learn
7.7K views·4 years ago
MULTIPLEXER [Its Block Diagram, Function Table, Circuit Diagram]
Simplify Tech2Learn
2.8K views·5 years ago
![Priority Encoder [with detail explanation , boolean equation and circuit diagram]](https://i.ytimg.com/vi/sgqavghRgvQ/hqdefault.jpg?sqp=-oaymwE2CNACELwBSFXyq4qpAygIARUAAIhCGAFwAcABBvABAfgB_gmAAtAFigIMCAAQARhlIGUoZTAP&rs=AOn4CLAKz7PwmbLYfeyfyD1YW2entav4jw)
![42 Encoder [with detail explanation, boolean expression, circuit diagram]](https://i.ytimg.com/vi/0aD4EaS1Vv0/hqdefault.jpg?sqp=-oaymwE2CNACELwBSFXyq4qpAygIARUAAIhCGAFwAcABBvABAfgB_gmAAtAFigIMCAAQARhQIFUoZTAP&rs=AOn4CLA35NJ7p6g5zEd3sSMomfue5OjG2Q)
![Magnitude Comparator[with Detailed Explanation, circuit diagram ]](https://i.ytimg.com/vi/shGIzvLH5DM/hqdefault.jpg?sqp=-oaymwE2CNACELwBSFXyq4qpAygIARUAAIhCGAFwAcABBvABAfgB_gmAAtAFigIMCAAQARhyIEsoMzAP&rs=AOn4CLCUT08C9c0QxMSgBP2gkeHvQNW9_w)
![38 DECODER WITH 24 DECODER [Detailed Explanation and Diagram]](https://i.ytimg.com/vi/yyTQ7aVSgX8/hqdefault.jpg?sqp=-oaymwE2CNACELwBSFXyq4qpAygIARUAAIhCGAFwAcABBvABAfgB_gmAAtAFigIMCAAQARhyIEwoMDAP&rs=AOn4CLAyfflXwxrGXFKUImHmul9Qm5LFIQ)
![24 Decoder With Enable Input. [Detailed Explaination]](https://i.ytimg.com/vi/Fjwg237h4Y0/hqdefault.jpg?sqp=-oaymwE2CNACELwBSFXyq4qpAygIARUAAIhCGAFwAcABBvABAfgB_gmAAtAFigIMCAAQARhyIFAoNzAP&rs=AOn4CLB3tO3XJrFuFjjzm3huDADiS-5MFg)
![ENCODER [with Explanation, Logic expression and Circuit Diagram]](https://i.ytimg.com/vi/LjV6n0MHqu0/hqdefault.jpg?sqp=-oaymwE2CNACELwBSFXyq4qpAygIARUAAIhCGAFwAcABBvABAfgB1AaAAuADigIMCAAQARhyIE0oNDAP&rs=AOn4CLBWxBkbu3tsIU7aB440RfgW1BJ5YQ)
![38 DECODER [With Detailed Explanation]](https://i.ytimg.com/vi/qNYhbXHBvtE/hqdefault.jpg?sqp=-oaymwE2CNACELwBSFXyq4qpAygIARUAAIhCGAFwAcABBvABAfgB1AaAAuADigIMCAAQARhlIGUoZTAP&rs=AOn4CLDWSl9wcNiXLtrHEWQqVD8CqIF__g)
![24 Decoder [Detailed Explanation with logic expression and logic circuit diagram]](https://i.ytimg.com/vi/v8yYsmKkDiY/hqdefault.jpg?sqp=-oaymwE2CNACELwBSFXyq4qpAygIARUAAIhCGAFwAcABBvABAfgB1AaAAuADigIMCAAQARhyIE4oNzAP&rs=AOn4CLAlssDkfVQN30T11XMIj0gCxYrqCA)
![81 MUX using 41 MUX and 21 MUX [Detailed explanation with logic expression & circuit diagram]](https://i.ytimg.com/vi/bKnl4ixZ9gE/hqdefault.jpg?sqp=-oaymwE2CNACELwBSFXyq4qpAygIARUAAIhCGAFwAcABBvABAfgB1AaAAuADigIMCAAQARhyIE8oOjAP&rs=AOn4CLBcmDn2L0EX3laUejefFMDgS1gWKw)
![DEMULTIPLEXER [Detailed explanation with block diagram, circuit diagram]](https://i.ytimg.com/vi/Uu3e8hVX_a4/hqdefault.jpg?sqp=-oaymwE2CNACELwBSFXyq4qpAygIARUAAIhCGAFwAcABBvABAfgB1AaAAuADigIMCAAQARhyIE8oQTAP&rs=AOn4CLCj_n2ul83Oox2Wa_B0uPqHFSO1WA)
![4 Bit Binary Adder [Detailed Explaination]](https://i.ytimg.com/vi/_N8kmU55V3Q/hqdefault.jpg?sqp=-oaymwE2CNACELwBSFXyq4qpAygIARUAAIhCGAFwAcABBvABAfgB1AaAAuADigIMCAAQARhlIGUoZTAP&rs=AOn4CLCb7tuIPjR332aq0jNnO-Zmm9NPnA)
![81 MULTIPLEXER [81 MUX (Its Block Diagram, Function Table, Circuit Diagram) ]](https://i.ytimg.com/vi/K_HabXoJEBk/hqdefault.jpg?sqp=-oaymwE2CNACELwBSFXyq4qpAygIARUAAIhCGAFwAcABBvABAfgB1AaAAuADigIMCAAQARhlIEUoRjAP&rs=AOn4CLBuxXtDtJnWX4kEmq-7i_4hVsxc_Q)
![41 MULTIPLEXER [41 MUX (Its Block Diagram, Function Table, Circuit Diagram) ]](https://i.ytimg.com/vi/C7KpF930k6A/hqdefault.jpg?sqp=-oaymwE2CNACELwBSFXyq4qpAygIARUAAIhCGAFwAcABBvABAfgB1AaAAuADigIMCAAQARhyIEsoOTAP&rs=AOn4CLD_fI6pt-FvA6kUopr8HEGS3uNsUg)
![MULTIPLEXER [Its Block Diagram, Function Table, Circuit Diagram]](https://i.ytimg.com/vi/mrwdPMhdIGk/hqdefault.jpg?sqp=-oaymwE2CNACELwBSFXyq4qpAygIARUAAIhCGAFwAcABBvABAfgB1AaAAuADigIMCAAQARhlIGUoZTAP&rs=AOn4CLCxB7HMGe5H2SMqPEb76fLhshNPEA)
![FULL ADDER USING HALF ADDER [Detailed Explanation]](https://i.ytimg.com/vi/VMOFDH00ujs/hqdefault.jpg?sqp=-oaymwE2CNACELwBSFXyq4qpAygIARUAAIhCGAFwAcABBvABAfgB1AaAAuADigIMCAAQARhYIF0oZTAP&rs=AOn4CLCkVLzcarVc4xAanOfwWdWvZzxYWw)
![FULL SUBTRACTOR [circuit diagram , Expression for Sum and Carry ,truth table]](https://i.ytimg.com/vi/z632zsFpC0I/hqdefault.jpg?sqp=-oaymwE2CNACELwBSFXyq4qpAygIARUAAIhCGAFwAcABBvABAfgB1AaAAuADigIMCAAQARhlIGUoZTAP&rs=AOn4CLCz4xB21y6rn2YneyO8b5zoFLwWfg)
![HALF SUBTRACTOR [Half Subtractor circuit diagram , boolean expressions, truth table]](https://i.ytimg.com/vi/_hDOL_g_mcU/hqdefault.jpg?sqp=-oaymwE2CNACELwBSFXyq4qpAygIARUAAIhCGAFwAcABBvABAfgB1AaAAuADigIMCAAQARhfIFooZTAP&rs=AOn4CLCMreEgVl_F9JWab60CqHsKqWMAMQ)
![FULL ADDER [Full Adder circuit diagram , Expression for Sum and Carry ,truth table]](https://i.ytimg.com/vi/0GWCTrqLfNE/hqdefault.jpg?sqp=-oaymwE2CNACELwBSFXyq4qpAygIARUAAIhCGAFwAcABBvABAfgB1AaAAuADigIMCAAQARhyIEsoODAP&rs=AOn4CLBGADIJINRhGO9O5Xvfi-P85p4lUA)
![HALF ADDER [Half Adder circuit diagram , truth table]](https://i.ytimg.com/vi/bpzU8ewRzco/hqdefault.jpg?sqp=-oaymwE2CNACELwBSFXyq4qpAygIARUAAIhCGAFwAcABBvABAfgB1AaAAuADigIMCAAQARhyIE0oPjAP&rs=AOn4CLAeN3y6qAgG2rBjAEdwasaabdCvqw)
![LOGIC GATES [OR,AND,NOT,NAND,NOR GATES] TRUTH TABLE AND BOOLEAN ALGEBRA](https://i.ytimg.com/vi/9LLPlbEpp3I/hqdefault.jpg?sqp=-oaymwE2CNACELwBSFXyq4qpAygIARUAAIhCGAFwAcABBvABAfgB1AaAAuADigIMCAAQARhlIGUoZTAP&rs=AOn4CLDD3xdXMnC7Z5PzgN8c-e8C8GU7bw)