Design a Digital Security Door Lock System using Verilog HDL for 4 users. Every user has 4-digit hexadecimal password. At the door entry user will be
selected. System will request for a password. Door unlocks if password is correct. Maximum 3 incorrect attempts allowed. After 3 wrong attempts, trigger alarm.
System is implemented using Verilog HDL and demonstrated using Basys3 FPGA board.
System is designed and demonstrated by PRANITHA SUNKARA, ADITI RAI, VIDHI SHAH and SOUMYA SOMPURA