Understanding Verification for Digital Design

Do you need to better understand Verification for your designs? Join us for a 1-hour webinar to look at where and when to use randomization, explore stimulus generation and auto checking, and learn about SystemVerilog randomization. This webinar will include live demos and a Q&A session with our BLT verification expert. Presented by BLT, AMD Authorized Training Provider and Premier Partner. For a complete list of upcoming live events and on-demand webinars from BLT, visit bltinc.com.