System Verilog Constraint Interview Question

In this video, we solve a SystemVerilog constraint randomization problem involving a dynamic array; Question: Write a constraint where a dynamic array size should be 10 and the array elements are 1, 5, and 7 only. The output should be in descending order (example outputs: {7,7,7,7,7,5,1,1,1,1} {7,7,5,5,5,5,1,1,1,1} {5,5,5,5,1,1,1,1,1,1} {7,5,1,1,1,1,1,1,1,1} …without using the rsort method.) #VLSI #systemverilog #constraints #designverification #interviewquestion